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  4. Design and Verification Tools (DVT) IDE for e, SystemVerilog, VHDL, and PSS

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Design and Verification Tools (DVT) IDE for e, SystemVerilog, VHDL, and PSS

Design and Verification Tools (DVT) IDE for e, SystemVerilog, VHDL, and PSS
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2022-06 (4.24)
2022-03 (4.23)
2021-12 (4.22)
2021-09 (4.21)
2021-06 (4.20)
2021-03 (4.19)
2020-12 (4.18)
2020-09 (4.17)
2020-06 (4.16)
2020-03 (4.15)
2019-12 (4.14)
2019-09 (4.13)
2019-06 (4.12)
2019-03 (4.11)
2018-12 (4.10)
2018-09 (4.9)
Photon (4.8)
Oxygen (4.7)
Neon (4.6)

https://www.dvteclipse.com/update/latest/
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Details

Design and Verification Tools (DVT) is an integrated development environment (IDE) for the design and verification engineers working with SystemVerilog, Verilog, VHDL, e, UPF, CPF, SLN, PSS, SDL. Including Universal Verification Methodology (UVM) support. It is similar to well-known programming tools like Visual Studio®, NetBeans®, and IntelliJ®. DVT comprises a proprietary IEEE standard-compliant parser, a smart code editor, an intuitive GUI, a comprehensive set of features that help with code inspection, navigation, documentation, and debugging, and an innovative linting framework. DVT allows design and verification engineers to overcome the limitations of plain text editors and use a modern and powerful tool that enables them to:

  • Increase the speed and quality of new code development
  • Easily understand complex or poorly documented source code
  • Simplify the maintenance of legacy code and reusable libraries
  • Accelerate language and methodology learning
  • Automatically generate well-organized source code documentation

 

FEATURES Some of the features that DVT offers include:

  • Compilation errors signaled on the fly
  • Autocomplete / Content Assist
  • Customizable code and project templates
  • Dedicated wizards to generate getters and setters, override functions, or help with UVM factory registration
  • Hyperlinks
  • Semantic Search and Show Usages
  • Quick fixes / Autocorrect
  • Refactoring
  • Macro expansion
  • Project database query views (types, macros, checks, etc.)
  • Structural views (type hierarchy, design hierarch, call hierarchy, etc.)
  • Signal tracing
  • UML and TLM diagrams for inspecting and documenting the verification environment
  • Schematic, trace, state machine diagrams for inspecting and documenting the design
  • Dedicated UVM support
  • Cross-language capabilities for mixed-language projects
  • In-line reminders for task tracking (TO DOs)
  • Vi and emacs emulation

 

INTEGRATION WITH OTHER TOOLS Since it is built on the Eclipse Platform, the DVT IDE can be easily integrated within a large plug-in ecosystem. It also integrates seamlessly with all major hardware simulators such as NCSim , Specman , VCS , and Questa, to enable simplified simulation analysis and debugging. In addition, it works with revision control systems like CVS, Git, Subversion, ClearCase and bug tracking systems such as Bugzilla and ClearQuest.
RESOURCES

 

  • DVT Eclipse IDE Web Page
  • DVT Eclipse IDE Datasheet
  • Demo movies
  • DVT Debugger Add-on
Categories:
  • Editor,
  • IDE,
  • Languages,
  • Source Code Analyzer
Tags:
  • IDE for hardware verification languages,
  • design and verification,
  • functional verification,
  • HVL,
  • HVLs,
  • VHDL,
  • Verilog,
  • SystemVerilog,
  • UVM,
  • VMM,
  • OVM,
  • e language,
  • amiq,
  • HDL,
  • HDLs,
  • EDA,
  • fileExtension_vhd,
  • fileExtension_vhdl,
  • fileExtension_e,
  • fileExtension_v,
  • fileExtension_vh,
  • fileExtension_v95,
  • fileExtension_v95p,
  • fileExtension_sv,
  • fileExtension_sva,
  • fileExtension_svh,
  • fileExtension_svp,
  • fileExtension_svi,
  • fileExtension_vams,
  • fileExtension_vha,
  • fileExtension_vhams,
  • fileExtension_vhms,
  • fileExtension_vhdp,
  • fileExtension_vhdlp,
  • fileExtension_vhcfg,
  • fileExtension_vp,
  • fileExtension_vs,
  • fileExtension_vsh,
  • fileExtension_vlib,
  • fileExtension_vcfg
Additional Details
Eclipse Versions: 
2022-06 (4.24), 2022-03 (4.23), 2021-12 (4.22), 2021-09 (4.21), 2021-06 (4.20), 2021-03 (4.19), 2020-12 (4.18), 2020-09 (4.17), 2020-06 (4.16), 2020-03 (4.15), 2019-12 (4.14), 2019-09 (4.13), 2019-06 (4.12), 2019-03 (4.11), 2018-12 (4.10), 2018-09 (4.9), Photon (4.8), Oxygen (4.7), Neon (4.6)
Platform Support: 
Windows, Mac, Linux/GTK
Organization Name: 
AMIQ EDA
Development Status: 
Production/Stable
Date Created: 
Wed, 2006-04-19 08:00
License: 
Commercial
Date Updated: 
Tue, 2023-09-12 15:03
Submitted by: 
AMIQ EDA
Screenshots
Screenshot 0
Screenshot 1
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Metrics
DateRankingInstallsClickthroughs
September 2023435/6419 (0%)19
August 2023441/67313 (0%)17
July 2023402/66919 (0.01%)15
June 2023343/67030 (0.01%)19
May 2023351/67231 (0.01%)24
April 2023409/66818 (0.01%)15
March 2023387/68828 (0.01%)32
February 2023386/66824 (0.01%)36
January 2023342/67734 (0.01%)38
December 2022386/80530 (0.01%)37
November 2022400/80831 (0.01%)25
October 2022367/81138 (0.01%)37
View Data for all Listings
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Friday, September 22, 2023 - 13:02

Reviews Sign in to post reviews

talha222's picture

Very informative post, I

Submitted by Talha Alyas on Tue, 2023-01-24 05:15

Very informative post, I really get awair by SYtem Veritilog.

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